Prior art III-V epitaxial wafer production employs a semiconductor layer to complete the epitaxial structure. Various semiconducting top layers are being used, for example GaAs, In.sub.1-x Ga.sub.x As, Al.sub.1-x Ga.sub.x As, InGaAsP, etc., depending on the specific device/circuit application and semiconductor substrate. The use of semiconducting top layers in prior art epitaxial wafer production results in uncontrollable and detrimental electrical and chemical surface properties. Electronic and optoelectronic device/circuit processing is complicated and device/circuit performance is affected. The degree of complication and degradation is subject to the particular device/circuit processing and application. For example, the fabrication and performance of unipolar transistor devices/circuits is hampered by plasma exposure, Fermi level pinning, and instability of the gate-source and gate-drain regions. The fabrication of functional and stable MOSFET devices has been impossible.
Uncontrollable and detrimental electrical and surface properties are caused by chemical surface reactions resulting in the formation of native oxides and dangling bonds. In turn, the surface is rendered thermodynamically unstable and exhibits a pinned Fermi level. Specifically, the high GaAs surface reactivity induces Fermi level pinning and surface instability after surface exposure as small as 10.sup.3 Langmuirs (1 Langmuir=10.sup.-6 Torr). Surface preparation techniques conducted after exposure to air (sulfur, selenium, etc.) have proven to be inefficient and unstable.
Prior art, for instance, M. Passlack et al., Appl. Phys. Lett., vol 68, 1099 (1996), Appl. Phys. Lett., vol. 68, 3605 (1996), and Appl. Phys. Lett., vol 69, 302, (1996), U.S. Pat. No. 5,451,548, entitled "Electron beam Deposition of gallium oxide thin films using a single purity crystal layer", issued Sep. 19, 1995, and U.S. Pat. No. 5,550,089, entitled "Gallium Oxide Coatings for Optoelectronic Devices Using Electron Beam Evaporation of a High Purity Single Crystal Gd.sub.3 Ga.sub.5 O.sub.12 Source", issued Aug. 27, 1996, reported that thermodynamically stable, III-V surfaces (interfaces) with low interface state density can be fabricated when a specific insulating cap layer is deposited in-situ on GaAs based semiconductor epitaxial layers using e-beam evaporation of Gd.sub.3 Ga.sub.5 O.sub.12 while maintaining ultra-high vacuum (UHV). For GaAs, pivotal aspects include an extremely low GaAs surface exposure to impurities (&lt;10-100 Langmuirs) and the preservation of GaAs bulk and surface stoichiometry, the complete exclusion of GaAs surface oxidation, and the requirements of a specific atomic structure associated with the interfacial atoms of GaAs and the deposited molecules. However, the process described in the prior art is not manufacturable since it is plagued by dc instability and poor reliability.
Accordingly, it would be highly advantageous to provide new methods of manufacturing which overcome these problems.
It is a purpose of the present invention to provide a new and improved III-V epitaxial wafer production process.
It is another purpose of the present invention to provide a new and improved III-V epitaxial wafer with improved stability and reliability.
It is still another purpose of the present invention to provide a new and improved III-V wafer which is relatively easy to fabricate and use.